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Marcelo Daniel Berejuck
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Finite-state Markov chains channel model for CubeSats communication uplink
JJ Lopez-Salamanca, LO Seman, MD Berejuck, EA Bezerra
IEEE Transactions on Aerospace and Electronic Systems 56 (1), 142-154, 2019
302019
Adding mechanisms for QoS to a network-on-chip
MD Berejuck, CA Zeferino
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System …, 2009
132009
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs
VMG Martins, PRC Villa, R Travessini, MD Berejuck, EA Bezerra
Microelectronics Reliability 83, 50-63, 2018
102018
Evaluation of silicon consumption for a connectionless network-on-chip
MD Berejuck, AA Fröhlich
arXiv preprint arXiv:1411.3492, 2014
62014
Dynamic reconfiguration support for FPGA-based real-time systems
MD Berejuck
Federal University of Santa Catarina, Florianópolis, Brazil, Tech. Rep, 2011
62011
Evaluation of blockchain techniques to ensure secure access on remote FPGA laboratories
E Werner, JC Matias, MD Berejuck, H Saliah-Hassane
2021 9th International Symposium on Digital Forensics and Security (ISDFS), 1-6, 2021
52021
Printed circuit board design methodology for embedded systems targeting space applications
CA Rigo, LO Seman, MD Berejuck, EA Bezerra
IEEE Latin America Transactions 18 (02), 257-264, 2020
52020
Evaluation of a connectionless technique for system-on-chip interconnection
MD Berejuck, AA Fröhlich
Journal of Circuits, Systems and Computers 25 (10), 1630005, 2016
52016
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library
RVM Pereira, FR De Sousa, EA Bezerra, MD Berejuck
2017 VII Brazilian Symposium on Computing Systems Engineering (SBESC), 161-166, 2017
42017
Work-in Progress: Development of an E-learning FPGA Platform Following the IEEE SA Std. 1876-2019 Standard for Networked Smart Learning Objects for Online Laboratories
MD Berejuck, JC Matias, E Werner, H Saliah-Hassane
Online Engineering and Society 4.0: Proceedings of the 18th International …, 2022
22022
A Brazilian Legal and Technical Evaluation about Energy Binomial Tariff
V Rodrigues, R Moraes, M Berejuck
2021 IST-Africa Conference (IST-Africa), 1-8, 2021
22021
MPI hardware framework for many-core based embedded systems
RVM Pereira, LO Seman, MD Berejuck, DRD Melo, AS Morales, ...
International Journal of Sensor Networks 35 (1), 42-56, 2021
22021
Rede intra-chip com qualidade de serviços para uso em telecomunicações
MD Berejuck
Universidade do Vale do Itajaí, 2009
22009
Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories
E Werner, JC Matias, MD Berejuck, H Saliah-Hassane
Online Engineering and Society 4.0: Proceedings of the 18th International …, 2022
12022
Building a microprocessor architecture at computer engineering undergraduate courses
M Sartor, T Soares, M Daniel
International Journal of Advanced Engineering Research and Science 7 (7 …, 2020
12020
Dedicated monitoring service without routing mitigation for Networks-on-Chip
G Ganzer, MD Berejuck
2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 121-124, 2019
12019
Network-on-Chip with load balancing based on interleave of flits technique
MD Berejuck
arXiv preprint arXiv:1510.06791, 2015
12015
Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories
MD Berejuck, H Saliah-Hassane
Online Engineering and Society 4.0: Proceedings of the 18th International …, 2021
2021
Evaluation of a Network-on-Chip designed to deal with multiple processors in a nanosatellite.
LCM Coutinho, MD Berejuck
Revista Brasileira de Computação Aplicada 12 (2), 93-102, 2020
2020
PD-Microprocessador de 32 bits com funções de Processamento Digital de Sinais para uso didático
MD Berejuck, AMF Gomes, M Trierveiler
Anais do Computer on the Beach 10, 170-178, 2019
2019
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Artikelen 1–20