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Avi Ziv
Avi Ziv
Research Staff Member, IBM
Verified email at il.ibm.com
Title
Cited by
Cited by
Year
Coverage directed test generation for functional verification using bayesian networks
S Fine, A Ziv
Proceedings of the 40th annual Design Automation Conference, 286-291, 2003
3302003
Genesys-pro: Innovations in test program generation for functional processor verification
A Adir, E Almog, L Fournier, E Marcus, M Rimon, M Vinov, A Ziv
IEEE Design & Test of Computers 21 (2), 84-93, 2004
2842004
An on-line algorithm for checkpoint placement
A Ziv, J Bruck
IEEE Transactions on computers 46 (9), 976-985, 1997
1751997
User defined coverage—a tool supported methodology for design verification
R Grinwald, E Harel, M Orgad, S Ur, A Ziv
Proceedings of the 35th annual Design Automation Conference, 158-163, 1998
1581998
Using a constraint satisfaction formulation and solution techniques for random test program generation
E Bin, R Emek, G Shurek, A Ziv
IBM Systems Journal 41 (3), 386-402, 2002
1192002
Hole analysis for functional coverage data
O Lachish, E Marcus, S Ur, A Ziv
Proceedings of the 39th annual Design Automation Conference, 807-812, 2002
972002
A unified methodology for pre-silicon verification and post-silicon validation
A Adir, S Copty, S Landa, A Nahir, G Shurek, A Ziv, C Meissner, ...
2011 Design, Automation & Test in Europe, 1-6, 2011
912011
Method and apparatus for collecting persistent coverage data across software versions
E Farchi, T Pavela, S Ur, A Ziv
US Patent App. 09/990,802, 2003
832003
Performance optimization of checkpointing schemes with task duplication
A Ziv, J Bruck
IEEE Transactions on Computers 46 (12), 1381-1386, 1997
801997
Post-silicon validation in the SoC era: A tutorial introduction
P Mishra, R Morad, A Ziv, S Ray
IEEE Design & Test 34 (3), 68-92, 2017
762017
Late binding of variables during test case generation for hardware and software design verification
S Ur, A Ziv
US Patent 7,003,420, 2006
632006
Bridging pre-silicon verification and post-silicon validation
A Nahir, A Ziv, R Galivanche, A Hu, M Abramovici, A Camilleri, B Bentley, ...
Proceedings of the 47th Design Automation Conference, 94-95, 2010
582010
Analysis of checkpointing schemes with task duplication
A Ziv, J Bruck
IEEE Transactions on computers 47 (2), 222-227, 1998
521998
Threadmill: A post-silicon exerciser for multi-threaded processors
A Adir, M Golubev, S Landa, A Nahir, G Shurek, V Sokhin, A Ziv
Proceedings of the 48th Design Automation Conference, 860-865, 2011
512011
Reaching coverage closure in post-silicon validation
A Adir, A Nahir, A Ziv, C Meissner, J Schumann
Hardware and Software: Verification and Testing, 60-75, 2011
512011
Learning microarchitectural behaviors to improve stimuli generation quality
Y Katz, M Rimon, A Ziv, G Shaked
Proceedings of the 48th Design Automation Conference, 848-853, 2011
442011
Functional verification of the IBM POWER7 microprocessor and POWER7 multiprocessor systems
KD Schubert, W Roesner, JM Ludden, J Jackson, J Buchert, V Paruthi, ...
IBM Journal of Research and Development 55 (3), 10: 1-10: 17, 2011
432011
Defining coverage views to improve functional coverage analysis
S Asaf, E Marcus, A Ziv
Proceedings of the 41st annual Design Automation Conference, 41-44, 2004
422004
Cross-product functional coverage measurement with temporal properties-based assertions [logic verification]
A Ziv
2003 Design, Automation and Test in Europe Conference and Exhibition, 834-839, 2003
402003
Analysis of checkpointing schemes for multiprocessor systems
A Ziv, J Bruck
Proceedings of IEEE 13th Symposium on Reliable Distributed Systems, 52-61, 1994
401994
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