Lionel Lacassagne
Lionel Lacassagne
Professor, Sorbonne University
Verified email at - Homepage
Cited by
Cited by
Motion detection: Fast and robust algorithms for embedded systems
L Lacassagne, A Manzanera, A Dupret
2009 16th IEEE international conference on image processing (ICIP), 3265-3268, 2009
Light speed labeling: efficient connected component labeling on RISC architectures
L Lacassagne, B Zavidovique
Journal of Real-Time Image Processing 6 (2), 117-135, 2011
High performance motion detection: some trends toward new embedded architectures for vision systems
L Lacassagne, A Manzanera, J Denoulet, A Mérigot
Journal of Real-Time Image Processing 4 (2), 127-146, 2009
What is the world's fastest connected component labeling algorithm?
L Cabaret, L Lacassagne
IEEE Workshop on Signal Processing Systems (SiPS), 2014, 1-6, 2014
A Review of World’s Fastest Connected Component Labeling Algorithms: Speed and Energy Estimation
L Cabaret, L Lacassagne, L Oudni
DASIP (Design of Architecture for Signal and Image Processing), 1-8, 2014
Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors
L Cabaret, L Lacassagne, D Etiemble
Journal of Real-Time Image Processing 15 (1), 173-196, 2018
Parallelization schemes for memory optimization on the cell processor: a case study on the harris corner detector
T Saidani, L Lacassagne, J Falcou, C Tadonki, S Bouaziz
Transactions on high-performance embedded architectures and compilers III …, 2011
The numerical template toolbox: A modern c++ design for scientific computing
P Esterie, J Falcou, M Gaunard, JT Lapresté, L Lacassagne
Journal of Parallel and Distributed Computing 74 (12), 3240-3253, 2014
Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing
D Etiemble, S Bouaziz, L Lacassagne
3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005., 61-66, 2005
Motion detection, labeling, data association and tracking, in real-time on RISC computer
L Lacassagne, M Milgram, P Garda
Image Analysis and Processing, 1999. Proceedings. International Conference …, 1999
High level transforms for SIMD and low-level computer vision algorithms
L Lacassagne, D Etiemble, A Hassan Zahraee, A Dominguez, P Vezolle
Proceedings of the 2014 Workshop on Programming models for SIMD/Vector …, 2014
Enhanced local binary covariance matrices (ELBCM) for texture analysis and object tracking
A Romero, M Gouiffès, L Lacassagne
Proceedings of the 6th International Conference on Computer Vision/Computer …, 2013
Algorithmic skeletons within an embedded domain specific language for the cell processor
T Saidani, J Falcou, C Tadonki, L Lacassagne, D Etiemble
2009 18th International Conference on Parallel Architectures and Compilation …, 2009
Image processing vision systems: Standard image sensors versus retinas
A Elouardi, S Bouaziz, A Dupret, L Lacassagne, JO Klein, R Reynaud
IEEE Transactions on Instrumentation and Measurement 56 (5), 1675-1687, 2007
16-bit floating point instructions for embedded multimedia applications
L Lacassagne, D Etiemble, SAO Kablia
Seventh International Workshop on Computer Architecture for Machine …, 2005
Performance evaluation of total focusing method on GPP and GPU
J Lambert, A Pedron, G Gens, F Bimbard, L Lacassagne, E Iakovleva
Proceedings of the 2012 Conference on Design and Architectures for Signal …, 2012
Parallelization schemes for memory optimization on the cell processor: a case study of image processing algorithm
T Saidani, S Piskorski, L Lacassagne, S Bouaziz
Proceedings of the 2007 workshop on MEmory performance: DEaling with …, 2007
A systemc TLM framework for distributed simulation of complex systems with unpredictable communication
J Peeters, N Ventroux, T Sassolas, L Lacassagne
Proceedings of the 2011 Conference on Design & Architectures for Signal …, 2011
Customizing CPU instructions for embedded vision systems
S Piskorski, L Lacassagne, S Bouaziz, D Etiemble
2006 International Workshop on Computer Architecture for Machine Perception …, 2006
Harris corner detection on a NUMA manycore
O Haggui, C Tadonki, L Lacassagne, F Sayadi, B Ouni
Future Generation Computer Systems 88, 442-452, 2018
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